Technologies / Architecture

Introduction to RISC-V architecture

The training provides a thorough preparation for working with RISC-V processors in embedded systems. The program is designed so that participants can learn both the theoretical basics and the practical aspects of implementing this open architecture. During the workshop, participants learn to program RISC-V processors and create their own implementations. The classes are conducted in a workshop format, where each issue is immediately verified in practice.

Issues

RISC-V architecture
ISA instruction set
Assembler programming
Processor implementation
Embedded systems
Debugging
Performance optimization
Hierarchy of memory
ISA extensions
Development tools
RISC-V ecosystem
SoC design

Benefits

The participant will gain fundamental knowledge of the RISC-V architecture and its practical applications
After the training, he will be able to develop software for RISC-V processors in machine language and C
He will acquire the ability to design his own implementations of RISC-V processors
Will learn methods for optimizing and debugging RISC-V based systems
Will gain a working knowledge of development tools and the RISC-V ecosystem
Will understand the advantages and limitations of the RISC-V architecture in the context of embedded systems

Who is this training for?

IC designers

Embedded systems engineers

Low-level programmers

Processor architects

R&D Engineers

System programmers

Prerequisites

Knowledge of the basics of computer architecture
Basic knowledge of the C language
Experience in low-level programming
Knowledge of embedded systems

Training program

Fundamentals of architecture

Set of instructions
RISC-V programming
Development environment
RISC-V Assembler
Programming in C

Processor implementation

Hierarchy of memory

Performance optimization
Practical applications
Embedded systems
SoC implementations

Development tools

Delivery Methods

Online

Convenience of participating from anywhere
Interactive live sessions with trainer
Materials available for 30 days
No travel costs

On-site

Direct contact with trainer and group
Intensive hands-on workshops
Networking with other participants
Full focus on learning

Frequently asked questions

What are the prerequisites for this training?

For Introduction to RISC-V architecture we recommend: Knowledge of the basics of computer architecture; Basic knowledge of the C language; Experience in low-level programming.

What is the format and duration of this training?

The training lasts 1 day and is available in online and on-site format. Sessions run from 9:00 AM to 4:00 PM. We can also customize the schedule to fit your team's needs.

Who is this training designed for?

This training is designed for: IC designers; Embedded systems engineers; Low-level programmers.